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Cache memory
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101	Improving the Performance of MPI Derived Datatypes by Optimizing Memory-Access Cost Surendra Byna† † William Gropp‡ Add to Reading List Source URL: wgropp.cs.illinois.edu Language: English - Date: 2016-08-16 11:52:12 Compiler optimizations Central processing unit Computer memory Compiler construction Computer architecture Message Passing Interface CPU cache MPICH Cache Data structure alignment Automatically Tuned Linear Algebra Software Optimizing compiler
102	Forecasting the cost of processing multi-join queries via hashing for main-memory databases Add to Reading List Source URL: web.cse.ohio-state.edu Language: English - Date: 2015-08-14 19:41:23 Search algorithms Hashing Cache Arrays Hash table Hash join Hash function CPU cache Query optimization Trie Join Database
103	EUROPEAN PATENT OFFICE U.S. PATENT AND TRADEMARK OFFICE CPC NOTICE OF CHANGES 266 DATE: AUGUST 1, 2016 PROJECT RP0311 Add to Reading List Source URL: www.cooperativepatentclassification.org Language: English Cache Central processing unit Computer memory CPU cache Web cache Trie Draft:Cache memory
104	Tesseract: Reconciling Guest I/O and Hypervisor Swapping in a VM Kapil Arya ∗ Yury Baskakov Add to Reading List Source URL: www.ccs.neu.edu Language: English - Date: 2014-02-06 00:42:35 Memory management Virtual memory Paging VMDK Defragmentation Hyper-V Hypervisor Page cache Virtualization Paravirtualization Fragmentation VMware
105	IEEE TRANSACTIONS ON COMPUTERS, VOL. 65, NO. 1, JANUARY 2016 Add to Reading List Source URL: www.eecs.qmul.ac.uk Language: English - Date: 2016-03-10 11:23:54 Cache CPU cache Centrality Distributed cache Draft:Cache memory
106	CS:APP2e Web Aside MEM:BLOCKING: Using Blocking to Increase Temporal Locality∗ Randal E. Bryant David R. O’Hallaron June 5, 2012 Add to Reading List Source URL: csapp.cs.cmu.edu Language: English - Date: 2012-06-05 05:40:07 Compiler optimizations Numerical linear algebra Cache Computer memory Locality of reference Software optimization Matrix multiplication Loop optimization Matrix Array data type Loop nest optimization Loop tiling
107	Using NCache for ASP.NET Sessions in Web Farms April 22, 2015 Add to Reading List Source URL: www.alachisoft.com Language: English - Date: 2015-09-07 10:01:01 Hypertext Transfer Protocol Cache Computer memory Distributed cache Computer architecture ASP.NET Domain Name System NCache Web.config Open Web Interface for .NET Web cache Session
108	Design of Parallel and High Performance Computing HS 2013 Markus P¨ uschel, Torsten Hoefler Department of Computer Science ETH Zurich Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2013-10-10 09:58:44 Cache coherency MESI protocol Cache coherence Cache False sharing Draft:Cache memory CPU cache
109	Review of last lecture  Architecture case studies  Memory performance is often the bottleneck  Parallelism grows with compute performance Add to Reading List Source URL: spcl.inf.ethz.ch Language: English - Date: 2015-10-04 17:36:16 Computer memory Transaction processing Computer architecture Concurrency control Compiler construction Memory ordering Consistency model Cache coherence Memory barrier Linearizability Schedule Sequential consistency
110	OPTIMIZATION AND PERFORMANCE MODELING OF STENCIL COMPUTATIONS ON MODERN MICROPROCESSORS‡ KAUSHIK DATTA†, SHOAIB KAMIL∗†, SAMUEL WILLIAMS∗†, LEONID OLIKER∗, JOHN SHALF∗, KATHERINE YELICK∗† Abstract. St Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-09-06 23:58:43 Computer architecture Cache Central processing unit Microprocessors Computer memory CPU cache Stencil code Loop nest optimization Opteron POWER5 Cell Multi-core processor

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